$24.5M · Agentrys + 2 more

What they're building

Agentrys is building what it calls Agentic Design Automation, or ADA. The distinction it draws against forty years of EDA is precise: traditional tools automate an isolated algorithm inside a step, while ADA automates the workflow around the steps. The agents read specifications, generate RTL and scripts, write assertions and testbenches, run the commercial EDA tools already in the flow, and debug what comes back. The product is Agentrys Studio, and its organizing idea is ownership. The pitch on the company's own site is blunt: the agents should be yours. They run behind your firewall, learn from your designs, and improve with every validated round. The framework is three moves: onboard existing workflows and tools on-premises, evolve multi-agent systems that adapt to your design patterns, then scale the proven agents across the org through a registry. It is deliberately open so customers can wire agents across commercial EDA tools, internal tools, and their own infrastructure. The evidence is unusually concrete for a company this young. On NVIDIA's CVDP benchmark, Agentrys reports roughly 90% on testbench stimulus generation and roughly 95% on both checker generation and assertion creation. Separately, the platform took a 32-bit CPU from specification all the way to a sign-off-clean GDS layout with no human in the loop. Functional verification and physical implementation are where it is strongest today; RTL design, analog, and system design are on the roadmap. Customers already include several top fabless semiconductor companies, a leading global foundry, and a set of chip startups. ADA was introduced publicly at DAC 2026.

Why this matters

Verification is where chip schedules die, and it is the part of the flow that has resisted automation hardest because it is judgment-shaped rather than algorithm-shaped. That is exactly the seam ADA is cutting into, and the CVDP numbers matter because CVDP is NVIDIA's own benchmark, not a metric Agentrys invented for a launch post. Roughly 95% on assertion and checker generation is not a demo; it is a claim you can be held to by the same engineers who would have to use it. The spec-to-GDS run on a 32-bit CPU is the more interesting proof. It is a small design by production standards, and Agentrys is not claiming otherwise, but it is the first time the full loop closed without a human stepping in, and closing the loop at all is the thing that changes what the roadmap can promise. Mark Ren built ChipNeMo at NVIDIA, the first industrial LLM for chip design, so the sequence here is legible: he shipped the model layer inside a big company, then left to build the workflow layer outside one. MediaTek leading the pre-seed as first strategic backer is the tell. A fabless chipmaker writing the first check is not a financial position; it is a design partner deciding it wants this to exist.